BÀI 3 : HIỆU ỨNG LED PIC18F4431 (PART 2)

- Đây là ảnh mô phỏng protues.

- Đây là code chương trình.

#include <stdio.h>
#include <stdlib.h>
#define _XTAL_FREQ 4000000 // if 4Mhz is XT
#include <xc.h>
// CONFIG1H
#pragma config OSC = XT // Oscillator Selection bits (HS oscillator)
#pragma config FCMEN = OFF // Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor disabled)
#pragma config IESO = OFF // Internal External Oscillator Switchover bit (Internal External Switchover mode disabled)

// CONFIG2L
#pragma config PWRTEN = OFF // Power-up Timer Enable bit (PWRT disabled)
#pragma config BOREN = OFF // Brown-out Reset Enable bits (Brown-out Reset disabled)
// BORV = No Setting

// CONFIG2H
#pragma config WDTEN = OFF // Watchdog Timer Enable bit (WDT disabled (control is placed on the SWDTEN bit))
#pragma config WDPS = 32768 // Watchdog Timer Postscale Select bits (1:32768)
#pragma config WINEN = OFF // Watchdog Timer Window Enable bit (WDT window disabled)

// CONFIG3L
#pragma config PWMPIN = OFF // PWM output pins Reset state control (PWM outputs disabled upon Reset (default))
#pragma config LPOL = HIGH // Low-Side Transistors Polarity (PWM0, 2, 4 and 6 are active-high)
#pragma config HPOL = HIGH // High-Side Transistors Polarity (PWM1, 3, 5 and 7 are active-high)
#pragma config T1OSCMX = OFF // Timer1 Oscillator MUX (Standard (legacy) Timer1 oscillator operation)

// CONFIG3H
#pragma config FLTAMX = RC1 // FLTA MUX bit (FLTA input is multiplexed with RC1)
#pragma config SSPMX = RC7 // SSP I/O MUX bit (SCK/SCL clocks and SDA/SDI data are multiplexed with RC5 and RC4, respectively. SDO output is multiplexed with RC7.)
#pragma config PWM4MX = RB5 // PWM4 MUX bit (PWM4 output is multiplexed with RB5)
#pragma config EXCLKMX = RC3 // TMR0/T5CKI External clock MUX bit (TMR0/T5CKI external clock input is multiplexed with RC3)
#pragma config MCLRE = OFF // MCLR Pin Enable bit (Disabled)

// CONFIG4L
#pragma config STVREN = OFF // Stack Full/Underflow Reset Enable bit (Stack full/underflow will not cause Reset)
#pragma config LVP = OFF // Low-Voltage ICSP Enable bit (Low-voltage ICSP disabled)

// CONFIG5L
#pragma config CP0 = OFF // Code Protection bit (Block 0 (000200-000FFFh) not code-protected)
#pragma config CP1 = OFF // Code Protection bit (Block 1 (001000-001FFF) not code-protected)
#pragma config CP2 = OFF // Code Protection bit (Block 2 (002000-002FFFh) not code-protected)
#pragma config CP3 = OFF // Code Protection bit (Block 3 (003000-003FFFh) not code-protected)

// CONFIG5H
#pragma config CPB = OFF // Boot Block Code Protection bit (Boot Block (000000-0001FFh) not code-protected)
#pragma config CPD = OFF // Data EEPROM Code Protection bit (Data EEPROM not code-protected)

// CONFIG6L
#pragma config WRT0 = OFF // Write Protection bit (Block 0 (000200-000FFFh) not write-protected)
#pragma config WRT1 = OFF // Write Protection bit (Block 1 (001000-001FFF) not write-protected)
#pragma config WRT2 = OFF // Write Protection bit (Block 2 (002000-002FFFh) not write-protected)
#pragma config WRT3 = OFF // Write Protection bit (Block 3 (003000-003FFFh) not write-protected)

// CONFIG6H
#pragma config WRTC = OFF // Configuration Register Write Protection bit (Configuration registers (300000-3000FFh) not write-protected)
#pragma config WRTB = OFF // Boot Block Write Protection bit (Boot Block (000000-0001FFh) not write-protected)
#pragma config WRTD = OFF // Data EEPROM Write Protection bit (Data EEPROM not write-protected)

// CONFIG7L
#pragma config EBTR0 = OFF // Table Read Protection bit (Block 0 (000200-000FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR1 = OFF // Table Read Protection bit (Block 1 (001000-001FFF) not protected from table reads executed in other blocks)
#pragma config EBTR2 = OFF // Table Read Protection bit (Block 2 (002000-002FFFh) not protected from table reads executed in other blocks)
#pragma config EBTR3 = OFF // Table Read Protection bit (Block 3 (003000-003FFFh) not protected from table reads executed in other blocks)

// CONFIG7H
#pragma config EBTRB = OFF // Boot Block Table Read Protection bit (Boot Block (000000-0001FFh) not protected from table reads executed in other blocks)
void GPIO_init(void);// goi ham xuat nhap
void delay_ms(unsigned int i);
unsigned int i;
void main (void)
{
GPIO_init(); //
unsigned char i,I,J,CD,D,Y,X;
while(1)
{
// left
PORTC = 0X01;
for(i=0;i<8;i++)
{
delay_ms(300);
PORTC = PORTC<<1;
}
// right
delay_ms(300);
PORTC = 0X80;
for(i=0;i<8;i++)
{
delay_ms(300);
PORTC = PORTC>>1;
}
// left 2
PORTC = 0X03;
for(i=0;i<4;i++)
{
delay_ms(300);
PORTC = PORTC<<2;
}
// right 2
PORTC = 0XC0;
for(i=0;i<4;i++)
{
delay_ms(300);
PORTC = PORTC>>2;
}
// chase left
delay_ms(300);
PORTC = 0X00;
for(i=0;i<9;i++)
{
delay_ms(300);
PORTC = PORTC>>1;
PORTC = PORTC | 0X80;
}
// chase right
delay_ms(300);
PORTC = 0X00;
for(i=0;i<9;i++)
{
delay_ms(300);
PORTC = PORTC<<1;
PORTC = PORTC | 1;
}
// chase on left
delay_ms(300);
PORTC = 0X00;
for(i=0;i<9;i++)
{
delay_ms(300);
PORTC = (PORTC<<1) | 0X01;
}
// chase off left
delay_ms(300);
for(i=0;i<9;i++)
{
delay_ms(300);
PORTC = PORTC<<1;
}
// chase right on and off
delay_ms(300);
X=0X00000000;
for(I=0;I<8;I++)
{
X=(X<<1)+0X01;
PORTC = X;
delay_ms(300);
}
for(I=0;I<8;I++)
{
X=(X>>1);
PORTC = X;
delay_ms(300);
}
// don 1
delay_ms(300);
CD=0X00000000;
for ( J=8;J>0;J--)
{
D=0X00000001;
for(I=0;I<J;I++)
{
Y=CD+D;
PORTC = (Y);
delay_ms(300);
D=(D<<1);
}
CD=Y;
}
// don 2
delay_ms(300);
CD=0X00;
for ( J=4;J>0;J--)
{
delay_ms(300);
D=0X03;//0x03
for(I=0;I<J;I++)
{
delay_ms(100);
Y=CD+D;
PORTC = (Y);
delay_ms(300);
D=(D<<2);
}
CD=Y;
}
}
}
void GPIO_init(void)
{
TRISC = 0X00; // cho porta la output
PORTC = 0X00; //
}
void delay_ms(unsigned int i)
{
for(i=0;i<10;i++)
{
__delay_ms(30);
}
}

- Link download project : Click here

BÀI 3 : HIỆU ỨNG LED PIC18F4431 (PART 2)

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Author : Huỳnh Ngọc Lâm

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